The ideal diode
An ideal diode is a MOSFET with a comparator watching which way the current wants to go. It behaves like a diode with almost no forward drop, and the LM66100 does it in a package smaller than the diode it replaces.
The previous page ended with a P-channel MOSFET that is a far better switch than a diode and is not a valve at all. An ideal diode chip is that MOSFET with the missing half built in — a comparator that watches the voltage across the FET and turns it off the moment current tries to flow the wrong way.
The LM66100 is the one to learn on. It is a six-pin SC-70, 2.1 mm by 2.0 mm, and it needs no external components whatsoever.
The numbers
- 1.5 V to 5.5 V in, 1.5 A continuous.
- 79 mΩ on at 5 V, 91 mΩ at 3.6 V, 141 mΩ at 1.8 V.
- 150 nA of quiescent current while it is running.
- 0.2 µA typical leakage backwards when it is blocking.
- −6 V absolute maximum on the input, which is what makes it survive a reversed supply.
The shape of the two curves is the whole argument. A diode's drop is a junction and barely moves; a MOSFET's is I × RON, a straight line through the origin. At 1.5 A the LM66100 drops 119 mV against a Schottky's 400-odd. At 50 mA it drops 4 mV against the same 400.
For a board that spends most of its life asleep and wakes for a burst, that second number is the one that matters, and it is the one a diode cannot improve on.
The CE pin is a comparator, not a logic input
This is the part of the datasheet that surprises people. CE does not compare against a threshold voltage. It compares against VIN:
- CE more than 250 mV below VIN — the MOSFET is on.
- CE more than 80 mV above VIN — the MOSFET is off.
Which gives you two completely different circuits from one pin.
Tie CE to ground and it is a very good switch that is always on. It blocks a reversed supply and nothing else.
Tie CE to VOUT and it becomes a diode. Now the chip is continuously comparing its own input against its own output: input higher, it conducts; output higher, it turns off in about 2 µs. No code, no external parts, no threshold to get wrong.
Two supplies, one rail
That second wiring is what ORing is. Put one chip on the USB rail and one on the battery, tie both outputs together, and the higher supply automatically carries the load.
Switch the figure to the plain P-FETs and press play again. With USB present, the cell's FET is still fully enhanced — its gate is at ground, its source is at 5 V — so 5 V feeds backwards into a lithium cell through an uncontrolled path. That is not charging. That is the failure "reverse current blocking" on a datasheet is describing, and it is why two P-FETs are not an ORing circuit.
The handover is the point, and it is over in microseconds. Pull the cable and the rail sags by the difference between the two supplies, the cell's switch closes, and the board carries on. A design that does this does not need its firmware to know a cable was removed.
What it will not do for you
The LM66100 has no current limit. A dead short on its output is a short straight through 79 mΩ, and 1.5 A is a continuous rating, not a protection. It will get hot, and then it will be destroyed, and nothing in the chip is trying to stop that.
It also has no charging logic in it anywhere. An ideal diode between a USB rail and a lithium cell stops the cell being fed backwards; it does not charge the cell, and if you want that you need the chips in the next chapter.
Where it goes
Any time the question is about direction. Two supplies that must not feed each other. A battery that must not be charged by a rail that is not a charger. A connector a user can fit backwards. A backup coin cell behind a main supply.
When the question is about amount as well, there is a chip that does both.
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