SPI/Wider belts/When it goes wrong
Lesson 14 of 14 · in 3D and VR

When it goes wrong

Four faults account for most SPI that misbehaves. Two peripherals answer at once, two ends disagree about the mode, the clock is faster than a part can follow, or a chip select is tied low. None of them raises an error, and each has a symptom of its own.

Lonely BinaryUpdated 2026-09-304 min readNo board required

View it in VR

Lesson 14 of the SPI course opens in a VR headset, on a table in front of you, and a voice starts three seconds after you arrive. Type this short address into the browser on a headset such as Meta Quest or Apple Vision Pro, and press Enter VR. No headset? Press Start the lesson: the same lesson, full screen.

learn.lonelybinary.com/vr/spi/14

SPI has no address, no acknowledge and no error check, so a fault shows up as wrong bytes and nothing else.

Two on MISO

Only the selected peripheral may drive MISO. The W25Q128JV datasheet says its DO pin is high impedance while /CS is high. If two chip selects are low at once, two chips push on one wire and the controller reads whichever wins, and both peripherals also hear the command. Keep exactly one chip select low.

Different modes

The mode is the clock's resting level and the edge the data is read on. A controller in mode 0 reading a part that expects mode 3 gets its bytes shifted by a place. The datasheet says which modes a part takes, and the code has to name one of them.

Too fast

A BME280 takes SPI at up to 10 MHz, while an ESP32 can drive 80. Past what a part can follow, some bits arrive wrong, which gives a reading that is nearly right. The limit is the slowest part on the bus.

Chip select tied low

With one peripheral on the bus, wiring its chip select low for good saves a pin, and the TFT_eSPI driver documents it for an ILI9341 display. What is lost is the chip's only framing signal. A W25Q128JV starts every instruction on a falling /CS, so with /CS held low the next command is taken as more clocks of the read before it, and the answer is the next bytes in memory. A display that slips by one bit can only be put back in step by a chip select pulse, a reset or a power cycle.

The ESP32 side of all this is in SPI and chip select, where this course hands over.

Common mistakes

  • Leaving a chip select floating at start-up. A pin not yet driven is at the mercy of the room, and that peripheral may join the transfer.
  • Tying chip select low on a part that needs edges. Flash chips and sensors such as the BME280 start and end a transaction on a chip select edge.
  • Mixing 3.3 V and 5 V parts without checking. The two families disagree about what a 1 is. Read logic levels, 3.3 V and 5 V before joining them.

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