Chapter · Screens
Fast links
MIPI DSI lanes and modes, LVDS, eDP, and how to pick a screen starting from the chip you have.
- 12MIPI DSI lanes4 minFew wires do not mean little bandwidth. A DSI lane is a differential pair running at up to gigabits a second, and lane count, per-lane rate, signalling state and timing together decide whether a panel's mode fits.
- 13DSI command and video mode4 minMIPI DSI names a link, not a place where the picture lives. In video mode the host streams pixels without stopping. In command mode a panel with its own memory stores what it is sent and refreshes itself. The interface name does not tell you which.
- 14LVDS4 minLVDS changes the electrical language, not just the connector. RGB pins cannot be turned into an LVDS link by rewiring, because the pixels have to be serialised onto differential pairs, which is the work of a bridge chip.
- 15eDP4 mineDP is not LVDS with a higher clock. Before a picture can appear, the source and the panel have to find each other, read the panel's capabilities and train the main link. A correct differential signal sent too early leaves the screen black.
- 16Start with your MCU4 minChoose the screen last. A display works when your chip can generate its signals, hold its frame, move its pixels fast enough and reach its interface, and each of those is a separate check that can fail on its own.
Start at 12 and read down — the order is the order things get easier in. Or take the one with your part in it; every article stands on its own, and links back to whatever it needs.