How much data is a screen

A frame is width times height times bits per pixel. A 128 × 64 monochrome OLED has 8,192 bits, exactly 1,024 bytes. Over I²C at 400 kHz, each byte costs eight data clocks plus an acknowledge, so those 1,024 bytes need at least 23.04 ms before a single command is sent.

Colour changes the scale

A 240 × 320 frame in RGB565, 16 bits a pixel, holds 1,228,800 bits, or 153,600 bytes. That is 150 times the OLED. Over a single SPI data line the payload alone takes:

• 122.9 ms at 10 MHz, the clock the ILI9341 datasheet rates.
• 30.7 ms at 40 MHz, a common practical setting.
• 19.7 ms at 62.5 MHz, the 16 ns write cycle of the ST7789VW.
• 15.4 ms at 80 MHz, the upper host setting on an ESP32, about 65 frames per second.

Only the first and third numbers come from a display datasheet. Forty and eighty megahertz are what the host can do, not something the panel promised, and all four are payload only. Commands, gaps between transfers, DMA set-up and the controller's own timing come on top.

A bigger screen

A 1024 × 600 RGB565 frame is 1.2288 MB. At 60 frames per second, active pixels alone need 73.7 MB/s. That is before the blanking a parallel RGB screen adds around every line, which only raises it.

Set that beside the I²C and SPI examples and the gap is the lesson. Being able to calculate the frame does not mean the chip can deliver it. An ESP32-S3 driving a panel this size is a measured example of what one configuration can do, and lesson eight puts real numbers on it.

These figures are floors. The real speed is set by the weakest link in the path, which may be the bus, the memory feeding it, or the display controller at the far end. A faster host clock helps only when the host was the weakest link.

Common mistakes

• A bigger screen just needs the same thing, a little faster. The data grows with width, height and colour depth together, so a 7-inch panel moves about 480 times the bits of the small OLED in every frame.
• Quoting the host clock as the display's speed. 80 MHz is the top of what an ESP32 can clock a SPI bus at. It says nothing about what the panel accepts, and it still does not guarantee 60 frames per second.
• Treating the floor as the result. 23.04 ms is the I²C minimum for a full OLED frame. A real update carries control bytes and commands, and lands nearer 25 ms.