QSPI displays

What Quad SPI means electrically is in the Quad SPI lesson. The display question is different. Which parts of a transfer use all four data lines?

One line, then four

In ESP-IDF panel I/O, quad mode moves the data phase onto four lines while the command stays on one. The SH8601 AMOLED driver shows it. It sends 0x02 for command writes and 0x32 for colour writes, in the high byte of a 32-bit command word. The command and address travel on one line, then the colour data opens out to four.

That is one controller's protocol, not a rule for every QSPI display. Another part may divide its phases differently, so read the controller's datasheet as well as the host's capabilities. On the ESP32-S3 and ESP32-P4, SPI LCD panel I/O supports the quad data phase. The classic ESP32 is not covered by that statement.

The arithmetic

Take a 368 × 448 RGB565 display as a 1.8-inch AMOLED-class example. The exact resolution depends on the module. One frame is 329,728 bytes. At 40 MHz the payload needs about 65.95 ms on one line, and 16.49 ms across four ideal lines.

A real update adds the command, the window setup, transaction boundaries and DMA chunks. The total runs longer than the ideal 16.49 ms. Those fixed costs do not shrink when the data lines quadruple.

Send less

If the software resends the whole frame when only a small rectangle changed, it moves 329,728 bytes to change a few hundred. On our bench, sending only the changed rectangle cuts the traffic directly. That is one possible cause of a slow QSPI display, not the only one.

Common mistakes

• Four lines make the update exactly four times faster. Only the colour payload gets the four lines. Commands, window setup and DMA boundaries stay as they were.
• Every QSPI display runs its commands on one line. That is how the SH8601 driver works. Check the protocol of the controller you have.
• Resending the whole frame for a small change. The window mechanism from the previous lesson applies here too, and it saves more than a wider bus can.