Chapter · Screens
Screens with their own memory
The four ways a host writes into a display controller's memory: I2C, SPI, QSPI and the 8080 parallel bus.
- 03I2C OLED4 minAn SSD1306 OLED holds its picture in 1,024 bytes of its own display memory, filled one page at a time over I²C. The glass shows that memory, not your software buffer, and the bus is not what keeps it lit.
- 04SPI TFT4 minA TFT controller does not know where a pixel belongs until you open a window. CASET and RASET set the rectangle, RAMWR pours pixels into it, and two byte-order mistakes can ruin the colours.
- 05QSPI displays4 minQuad SPI is a question about phases, not wires. On the SH8601 the command goes out on one line and only the long colour payload spreads across four, so the update gains less than four times.
- 068080 parallel4 minAn 8080 display has no clock line. The write strobe WR sets the beat and the controller latches the bus on its rising edge. Bus width decides how many strobes a pixel needs, and the controller sets the speed limit.
Start at 03 and read down — the order is the order things get easier in. Or take the one with your part in it; every article stands on its own, and links back to whatever it needs.