InteractiveOpen the ESP32-S3 in 3DTurn the real board over and click any of its 44 holes. Every pad is placed from this design’s own net list.Open in 3D →Reading this board
Two 22-pin headers, 44 holes: 36 GPIO and eight power. The S3's GPIO matrix routes almost any peripheral to almost any pin, which is why people assume every pin is free. On the N16R8 module we ship, twelve are not; the table at the bottom of this page names each one and what has it.
Every row is read from this design's own net list, so the hole in the table is the hole on your desk. Open the board in 3D to turn it over and click one.
What the module takes
GPIO35, 36 and 37 belong to the octal PSRAM, and nothing about the board
says so: the pads sit on the header looking like any other pin while the PSRAM
is already running on them, before your setup() gets a turn. Drive one and you
corrupt PSRAM traffic, which takes the chip down rather than failing quietly.
On a quad-PSRAM (R2) or no-PSRAM module they are ordinary GPIO. Quad PSRAM shares the flash bus inside the module and needs nothing of yours.
When it will not boot
GPIO0, 3, 45 and 46 are sampled once, as the chip leaves reset, to pick boot mode, JTAG source and flash voltage. Afterwards they are yours.
A board that flashes and runs over USB, then will not start on its own supply, is almost always one of those four. Something you wired — a pull-down on GPIO0, an LED on GPIO46 — holds a strapping pin at the wrong level while the rail comes up, and USB was rising slowly enough to hide it. Boot it bare, then add one wire at a time.
GPIO26 to 34 are in none of this because they are not on the board: the flash bus lives inside the module and never comes out.
Power
3V3 is the output of an AMS1117-3.3, and the module, the bridge and both LEDs
already draw from it. Budget about 500 mA for your own parts, less once the
radio is transmitting — the regulator is the ceiling, not what the USB port is
willing to give.
5V is bus voltage, present only when USB is connected. RST is the regulator
enable line, pulled up: tie it to ground through a button for a second reset
button. All four GND holes are the same net, spread across both rows.
Buses
Defaults the Arduino core assumes, and the ones the examples on this site use:
| Bus | Pins | Note |
|---|---|---|
| I²C | SDA GPIO8, SCL GPIO9 | Remappable; 4.7 kΩ pull-ups needed if the module has none |
| SPI (HSPI) | MOSI GPIO11, MISO GPIO13, SCK GPIO12, SS GPIO10 | |
| SPI3 (VSPI) | MOSI GPIO35, SCK GPIO36, MISO GPIO37 | The PSRAM pins — unusable on an R8 |
| UART0 | TX GPIO43, RX GPIO44 | The USB serial console — leave it alone |
| UART1 | TX GPIO17, RX GPIO18 | Serial1, and yours |
ADC
ADC1 is GPIO1 to GPIO10 and works whatever Wi-Fi is doing. ADC2 is GPIO11 to
GPIO20 and stops the moment Wi-Fi starts, because the driver hands the block to
the radio front end; a read returns an error from then on rather than a wrong
number. An analog reading that dies at exactly the line where you call
WiFi.begin() is this, and the fix is an ADC1 pin.
That leaves nine you can trust on a connected board: GPIO1, 2 and 4 through 10. GPIO3 is ADC1 as well, but it is one of the four above, so whatever you attach has to be quiet at reset.
Capacitive touch is T1 to T14, on GPIO1 to GPIO14.
Pins to leave alone
- GPIO15 — ADC2, so analogRead stops working the moment Wi-Fi starts. Unaffected as a digital pin.
- GPIO16 — ADC2, so analogRead stops working the moment Wi-Fi starts. Unaffected as a digital pin.
- GPIO17 — ADC2, so analogRead stops working the moment Wi-Fi starts. Unaffected as a digital pin.
- GPIO18 — ADC2, so analogRead stops working the moment Wi-Fi starts. Unaffected as a digital pin.
- GPIO3 — Strapping pin. Selects the JTAG source. Floating at reset is the normal state.
- GPIO46 — Strapping pin. Controls the ROM boot message. Must be low at reset.
- GPIO11 — ADC2, so analogRead stops working the moment Wi-Fi starts. Unaffected as a digital pin.
- GPIO12 — ADC2, so analogRead stops working the moment Wi-Fi starts. Unaffected as a digital pin.
- GPIO13 — ADC2, so analogRead stops working the moment Wi-Fi starts. Unaffected as a digital pin.
- GPIO14 — ADC2, so analogRead stops working the moment Wi-Fi starts. Unaffected as a digital pin.
- GPIO43 — UART0 TX, wired to the USB-UART bridge behind the second USB-C port.
- GPIO44 — UART0 RX, wired to the USB-UART bridge behind the second USB-C port.
- GPIO37 — Octal PSRAM strobe on the N16R8. The pad is still on the header, which is what makes it a trap: drive it and you corrupt the module's own traffic, which usually takes the chip down. Free on a module that does not need the line.
- GPIO36 — Octal PSRAM data line on the N16R8. The pad is still on the header, which is what makes it a trap: drive it and you corrupt the module's own traffic, which usually takes the chip down. Free on a module that does not need the line.
- GPIO35 — Octal PSRAM data line on the N16R8. The pad is still on the header, which is what makes it a trap: drive it and you corrupt the module's own traffic, which usually takes the chip down. Free on a module that does not need the line.
- GPIO0 — BOOT button, with a 10 kΩ pull-up. Held low at reset it drops the chip into the ROM bootloader.
- GPIO45 — Strapping pin. Sets VDD_SPI to 3.3 V or 1.8 V. Must be low at reset on a 3.3 V module.
- GPIO48 — WS2812B RGB LED, single-wire at 800 kHz. The silkscreen says RGB@IO48.
- GPIO20 — Native USB-C, D+ . Wired straight to the USB-Serial-JTAG peripheral, no bridge chip in the path.
- GPIO19 — Native USB-C, D− . Wired straight to the USB-Serial-JTAG peripheral, no bridge chip in the path.
Every pin
| Pin | Name | Functions | Notes |
|---|---|---|---|
| 3V3 | 3.3 V rail | power | L1. Output of the on-board regulator, not an input. Everything on the board runs from it. Budget what the regulator can spare, not what USB can deliver. |
| 3V3 | 3.3 V rail | power | L2. Output of the on-board regulator, not an input. Everything on the board runs from it. Budget what the regulator can spare, not what USB can deliver. |
| RST | EN / reset | power | L3. The regulator enable line, pulled up. Tie it to ground through a button and you have a reset button. |
| GPIO4 | GPIO4 | gpio, adc1, touch | L4 |
| GPIO5 | GPIO5 | gpio, adc1, touch | L5 |
| GPIO6 | GPIO6 | gpio, adc1, touch | L6 |
| GPIO7 | GPIO7 | gpio, adc1, touch | L7 |
| GPIO15 | GPIO15 | gpio, adc2 | ADC2, so analogRead stops working the moment Wi-Fi starts. Unaffected as a digital pin. |
| GPIO16 | GPIO16 | gpio, adc2 | ADC2, so analogRead stops working the moment Wi-Fi starts. Unaffected as a digital pin. |
| GPIO17 | GPIO17 | gpio, adc2, uart | ADC2, so analogRead stops working the moment Wi-Fi starts. Unaffected as a digital pin. |
| GPIO18 | GPIO18 | gpio, adc2, uart | ADC2, so analogRead stops working the moment Wi-Fi starts. Unaffected as a digital pin. |
| GPIO8 | GPIO8 | gpio, adc1, touch, i2c | L12. Arduino default: Wire (I²C) SDA. |
| GPIO3 | GPIO3 | gpio, adc1, touch | Strapping pin. Selects the JTAG source. Floating at reset is the normal state. |
| GPIO46 | GPIO46 | gpio | Strapping pin. Controls the ROM boot message. Must be low at reset. |
| GPIO9 | GPIO9 | gpio, adc1, touch, i2c | L15. Arduino default: Wire (I²C) SCL. |
| GPIO10 | GPIO10 | gpio, adc1, touch, spi | L16. Arduino default: SPI (HSPI) SS. |
| GPIO11 | GPIO11 | gpio, adc2, touch, spi | ADC2, so analogRead stops working the moment Wi-Fi starts. Unaffected as a digital pin. |
| GPIO12 | GPIO12 | gpio, adc2, touch, spi | ADC2, so analogRead stops working the moment Wi-Fi starts. Unaffected as a digital pin. |
| GPIO13 | GPIO13 | gpio, adc2, touch, spi | ADC2, so analogRead stops working the moment Wi-Fi starts. Unaffected as a digital pin. |
| GPIO14 | GPIO14 | gpio, adc2, touch | ADC2, so analogRead stops working the moment Wi-Fi starts. Unaffected as a digital pin. |
| 5V | 5 V rail | power | L21. The USB rail, upstream of the regulator. Feed the board here if you are not using USB, or take 5 V out if you are. |
| GND | Ground | power | L22. Ground. Several holes so a breadboard build has one nearby wherever it needs it. |
| GND | Ground | power | R1. Ground. Several holes so a breadboard build has one nearby wherever it needs it. |
| GPIO43 | TX | gpio, uart | UART0 TX, wired to the USB-UART bridge behind the second USB-C port. |
| GPIO44 | RX | gpio, uart | UART0 RX, wired to the USB-UART bridge behind the second USB-C port. |
| GPIO1 | GPIO1 | gpio, adc1, touch | R4 |
| GPIO2 | GPIO2 | gpio, adc1, touch | R5 |
| GPIO42 | GPIO42 | gpio, jtag | R6 |
| GPIO41 | GPIO41 | gpio, jtag | R7 |
| GPIO40 | GPIO40 | gpio, jtag | R8 |
| GPIO39 | GPIO39 | gpio, jtag | R9 |
| GPIO38 | GPIO38 | gpio | R10 |
| GPIO37 | GPIO37 | gpio, spi | Octal PSRAM strobe on the N16R8. The pad is still on the header, which is what makes it a trap: drive it and you corrupt the module's own traffic, which usually takes the chip down. Free on a module that does not need the line. |
| GPIO36 | GPIO36 | gpio, spi | Octal PSRAM data line on the N16R8. The pad is still on the header, which is what makes it a trap: drive it and you corrupt the module's own traffic, which usually takes the chip down. Free on a module that does not need the line. |
| GPIO35 | GPIO35 | gpio, spi | Octal PSRAM data line on the N16R8. The pad is still on the header, which is what makes it a trap: drive it and you corrupt the module's own traffic, which usually takes the chip down. Free on a module that does not need the line. |
| GPIO0 | GPIO0 | gpio | BOOT button, with a 10 kΩ pull-up. Held low at reset it drops the chip into the ROM bootloader. |
| GPIO45 | GPIO45 | gpio | Strapping pin. Sets VDD_SPI to 3.3 V or 1.8 V. Must be low at reset on a 3.3 V module. |
| GPIO48 | GPIO48 | gpio | WS2812B RGB LED, single-wire at 800 kHz. The silkscreen says RGB@IO48. |
| GPIO47 | GPIO47 | gpio | R17 |
| GPIO21 | GPIO21 | gpio | R18 |
| GPIO20 | GPIO20 | gpio, adc2, usb | Native USB-C, D+ . Wired straight to the USB-Serial-JTAG peripheral, no bridge chip in the path. |
| GPIO19 | GPIO19 | gpio, adc2, usb | Native USB-C, D− . Wired straight to the USB-Serial-JTAG peripheral, no bridge chip in the path. |
| GND | Ground | power | R21. Ground. Several holes so a breadboard build has one nearby wherever it needs it. |
| GND | Ground | power | R22. Ground. Several holes so a breadboard build has one nearby wherever it needs it. |
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