Three wires, no master clock
I2S carries sound on three wires: a bit clock, a left/right clock and the data. Many DACs want a fourth, a fast master clock. The PCM5102A on this board builds its own from the bit clock instead, but only for the bit clocks in TI's table, and the one setting a beginner meets outside it is 16-bit stereo at 16 kHz.
Three wires
- BCK, the bit clock, ticks once per bit.
- DIN carries one bit on each tick, most significant bit first.
- LRCK, the left/right clock, says whose bits they are: LOW for the left sample, HIGH for the right. It changes once per sample, so it runs at the sample rate itself.
The ESP32-S3 makes all three, and the TK103 only listens. The site's I2S page covers the peripheral and its buffers; this article is about the one thing this chip asks of them.
A frame is two slots
One sample period of LRCK holds a frame: a slot for the left sample, then a slot for the right. A slot is 16 or 32 bits wide, so BCK ticks 32 or 64 times per sample. That count is written 32 fs or 64 fs, fs being the sample rate. The ESP32-S3's usual setting, 16-bit stereo, is 32 fs.
The chip makes its own master clock
Many DACs want a fourth, much faster clock, the system or master clock. On the TK103 that input is not wired. The PCM5102A has a PLL inside that multiplies BCK up to the clock it needs, which is what makes three wires enough.
A PLL can only multiply by the ratios it was designed for. TI's table 11 lists the bit clocks it locks to at each sample rate:
At 32 kHz and above, 32 fs and 64 fs are both in the table, so 16-bit stereo just works. At 16 kHz only 64 fs is listed, which means 32-bit slots. At 8 kHz nothing is listed: this board cannot play 8 kHz audio as it stands.
16 kHz in 32-bit slots
Speech is often recorded at 16 kHz, and the TK101 microphone's sketches use it. To play it on the TK103, open the DAC with 32-bit slots and put each 16-bit sample in the top half of a 32-bit number:
dac.begin(I2S_MODE_STD, RATE, I2S_DATA_BIT_WIDTH_32BIT,
I2S_SLOT_MODE_STEREO);
// ...
out[2 * i] = out[2 * i + 1] = s * 65536; // top 16 of 32 bitsThose lines are from the TK101 book's live-monitor sketch, which runs the microphone and this DAC together at 16 kHz.
The owner's bench code ran 16-bit stereo at 16 kHz on this board and heard sound. That setting is outside the datasheet's table: it may lock or may not, on another board or another day. The book's sketches stay inside it.
When it does not work
8 kHz is not in TI's table at any bit clock, so on this board the chip has nothing to build its master clock from. Play at 16 kHz with 32-bit slots, or at 32 kHz and above.
Not on this board. The chip's master-clock input, SCK, is not brought to the header: the TK103 is built for three-wire I2S, and the table in this article is the rule it follows.
The DAC plays at whatever rate the clocks run, and the clocks run at the rate the sketch gave begin(). If the samples were recorded at 44.1 kHz and the sketch says 48000, everything plays a little fast and high. Make the two agree.
Yes. The ESP32-S3 has two I2S peripherals, and only one of them can receive PDM, so the microphone takes that one and the DAC the other. The ESP_I2S library picks the port for you.
What the sixth pin does, and why you may leave it alone.
XSMT: a mute that ramps →Edit this page — content/books/i2s-dac/three-wires-no-master-clock.mdx
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